DPGEN_FIFO - Online Linux Manual PageSection : 3
Updated : 30 July 2004
Source : ASIM/LIP6
Note : Alliance - genlib User's Manual
NAMEDPGEN_FIFO − FIFO Macro-Generator
SYNOPSIS#include <genlib.h> void GENLIB_MACRO (DPGEN_FIFO, char *modelname, long flags, long N);
DESCRIPTIONGenerate a FIFO of regNumber words of N bits named modelname. How it works : • datain0 and datain1 : the two write busses. Only one is used to actually write the FIFO, it is selected by the sel signal. • sel : when set to '0' the datain0 is used to write the register word, otherwise it will be datain1. • r, rok : set r when a word is requested, rok tells that a word has effectively been popped (rok == not empty). • w, wok : set w when a word is pushed, wok tells that the word has effectively been pushed (wok == not full).
TERMINAL NAMES1. ck : clock signal (input, 1 bit). 2. reset : reset signal (input, 1 bit). 3. r : read requested (input, 1 bits). 4. w : write requested (input, 1 bits). 5. rok : read acknowledge (output, 1 bits). 6. wok : write acknowledge (output, 1 bits). 7. sel : select the write bus (input, 1 bit). 8. datain0 : first write bus (input, N bits). 9. datain1 : second write bus (input, N bits). 10. dataout : read bus (output, N bits). 11. vdd : power. 12. vss : ground.
EXAMPLEGENLIB_MACRO(DPGEN_RF1, "model_fifox8_32"
, F_BEHAV|F_PLACE
, 32 /* Words size. */
, 8 /* Number of words. */
);
GENLIB_LOINS( "model_fifox8_32"
, "instance1_fifo1_32"
, "ck"
, "r"
, "w"
, "rok"
, "wok"
, "sel"
, "datain0[31:0]"
, "datain1[31:0]"
, "dataout[31:0]"
, "vdd", "vss", NULL
);
SEE ALSOGENLIB_MACRO(3), genlib(1) 0
Johanes Gumabo
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